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 TA1317ANG
TOSHIBA Bipolar Linear Integrated Circuit Silicon Monolithic
TA1317ANG
Deflection Processor IC for TV
TA1317ANG is a deflection processor IC for a large and wide picture tube. TA1317ANG incorporates an EW, a vertical distortion correction circuit and a dynamic focus correction circuit. It can control various functions via I2C BUS line.
Features
* * * * * * * * * * * * * * * * * * * * * Vertical drive (AC/DC-coupling) Picture height adjustment Vertical shift adjustment Vertical symmetry correction Vertical linearity correction Vertical S correction Vertical integral correction Vertical/Horizontal EHT compensation EW drive (parabola/PWM output) Picture width EW trapezium correction EW parabola correction EW corner correction (top only/bottom only/top & bottom) EW S correction Center curve correction (SAW/PAR) Parabola output for horizontal and vertical dynamic focus (H/V output independently) Horizontal and vertical dynamic focus phase adjustment Horizontal and vertical dynamic focus amplitude adjustment Horizontal dynamic focus curve characteristic adjustment V-ramp limiter circuit Analog blanking output Weight: 1.22 g (typ.)
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TA1317ANG
Block Diagram
V-RAMP FILTER
CENTER OUT
DIGITAL GND
AGC FILTER
TC FILTER
H-DF OUT
V-DF OUT
BLK OUT
LVP IN
24
23
22
21
VIN
20
19
18
17 LVP DETECT
16 V-DF OUT V-DF AMP VI
15
14
2
13
AGC
V-RAMP
PULSE GENE
ANALOG BLK
CENTER OUT
+
I CBUS DECODER H-DF OUT V-DF PHASE
V SYMMETRY V LINEARITY
VI V-S CORRECTION V- CORRECTION + + V AMP
CENTER PARABOLA
CENTER SAW
VI EW TRAPEZIUM EW-S CORRECTION + EW AMP H-DF PHASE H-DF BATHTUB H-RAMP VI EW CORNER
V EHT V-RAMP LIMITER DAC V GUARD DETECT V PHASE
H EHT
EW WIDTH
BAND-GAP 1 VREF 2 CENTER DAC 3 EHT IN 4 V DRIVE 5 V-DC REF 6 V NF 7 VCC
EW PWM 8 EW PWM 9 ANALOG GND 10 EW FD 11 EW FILTER 12 FBP IN
2
SDA
SCL
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TA1317ANG
Pin Functions
Pin No. Pin Name Function Interface Circuit Input/Output Signal
7 Internal reference voltage adjustment pin. If the CRT DY has a temperature coefficient, it can be cancelled in the TV by applying the inverse temperature coefficient to this pin. In case of not using it, connect a 0.01 F capacitor between this pin and GND. 1 k 10 k 10.3 k
1
VREF
1
40 k
1 k
9
7 DAC output pin. When bus write function VD = 0, 2 bit DAC output; VD = 1, 7 bit DAC output. In case of not used, it should be open. 50
2
CENTER DAC
2 5 k
DC
9
7 EHT input pin. In case of not using it, connect a 0.01 F capacitor between this pin and GND.
3
EHT IN
3 10 k 4.5 V 11 k
DC
9
7
4
V DRIVE
Vertical output pin
4
100
30 k 4.5 k
9
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TA1317ANG
Pin No. Pin Name Function Interface Circuit Input/Output Signal
7 1 k 5 V-DC REF DC reference voltage output pin when V is DC coupling. In case of not used, it should be open. 5 5 k
DC 30 k 40 k 9
6
V NF
Vertical negative feedback input pin. When VD = 0, if pin is 1.2 V (typ.) or below, or 3.7 V (typ.) or higher, returns abnormal detection result to BUS read function (V guard), forcibly setting pin 20 to High. When VD = 1, if pin is 2.4 V (typ.) or below, or 7.4 V (typ.) or higher, abnormality is detected.
7 12.5 k
6
50
9
7
VCC
VCC pin. Connect 9 V (typ.).
7 EW D drive (PWM) output pin. Open collector output. In case of not used, it should be open. 8
8
EW PWM
9
9
ANALOG GND
GND pin for analog block
7
10
EW FD
EW feedback pin
10
60 k
9
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Pin No. Pin Name Function Interface Circuit Input/Output Signal
7
11
EW FILTER
Connect phase compensation filter for EW output. The EW parabola waveform can be extracted from this pin.
11
100 100 500
9
7
12
FBP IN
2.25 V
FBP input pin. In case of H-DF and EW-PWM outputs are not used, it should be open.
12
500
Th: 2.25 V
5.0 V
Input frequency: 28 k~45 kHz
9 15
7
13
SDA
ACK 15
14
20 k
SCL
15
DIGITAL GND
GND pin for digital block
3V
14
SCL
SCL pin for I C bus
2
3V
13
SDA
SDA pin for I C bus
2
50 20 k
Th: 2.25 V
7
Th: 2.25 V
15
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Pin No. Pin Name Function Interface Circuit Input/Output Signal
7 Outputs parabola waveform for horizontal dynamic focus. Mask the pulse in horizontal blanking if it is not needed. In case of not used, it should be open. 100
H-BLK 16 1 k 22.5 k 200
16
H-DF OUT
H-DF OUT 9 15
17
LVP IN
LVP detection pin. Connect reference voltage used to protect deflection circuit against low supply voltage. If this pin is 5.0 V (typ.) or below, returns abnormal detection result to bus read function. In case of LVP detection is not used, it should be open.
7
17
3 k DC
18
V-DF OUT
Outputs parabola waveform for vertical dynamic focus. In case of not used, it should be open.
18
100
1 mA
2 k
19
CENTER OUT
22.5 k
Outputs center curve correction waveform. Connect this pin to curve correction input pin of horizontal sync IC. In case of not used, it should be open.
100
5V 9 7 9 7
or 19 1 k
9
or composite of above two waveforms
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Pin No. Pin Name Function Interface Circuit Input/Output Signal
7 200 20 1 k Analog blanking output pin. Open collector output. In case of not used, it should be open. 200
20
BLK OUT
9
7
21
VIN
Inputs vertical trigger pulse. Notifies subsequent circuit of input fall as trigger.
Th: 1.5 V 21 2 k
9
7
22
TC FILTER
Connects filter for generating internal pulse.
22
100 10 k
9
7
23 Connects filter for generating vertical ramp signal.
1 k
23
V-RAMP FILTER
100
1 k
9
7
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TA1317ANG
Pin No. Pin Name Function Interface Circuit Input/Output Signal
7 Connects filter used to automatically adjust oscillation amplitude of vertical ramp signal. Can switch AGC sensitivity by BUS write function. 500 500
24
AGC FILTER
24 2.25 V
1 k
3.2 V
9
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Bus Control Map
Write Mode
Slave Address: 8CH (10001100)
Sub-Address 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 D7 MSB D6 D5 D4 D3 D2 D1 D0 LSB Preset MSB LSB 1000 1000 1000 1000 1000 0000 0000 0000 0000 0000 0000 1000 1000 0000 0000 0000 0000 0000 0000 0000 0000 1000 0000
PICTURE HEIGHT PICTURE WIDTH1 V LINEARITY ANALOG V-BLK STOP PHASE ANALOG V-BLK START PHASE V CENTERING V-DF PHASE H-DF PHASE H-DF CURVE V AGC * * EW TRAPEZIUM EW TOP CORNER EW BOTTOM CORNER EW S CORRECTION EW CORNER CENTER PARABOLA V SYMMETRY * * * * CENTER SAW * * * * V-DF AMPLITUDE H-DF AMPLITUDE V INTEGRAL CORRECTION V S CORRECTION EW PARABOLA V SHIFT V-EHT COMPENSATION H-EHT COMPENSATION V-RAMP LIMIT2
VD
V-RAMP LIMIT1
1000 1000 1000 1000 1000 1000
V STOP
PICTURE WIDTH2
1000 1000 1000 1000 1000 1000 0000
* * *
Read Mode
Slave Address: 8DH (10001101)
D7 MSB 0 V DF D6 H DF D5 LVP D4 V NF D3 V GUARD D2 EW OUT D1 V OUT D0 LSB POR
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Bus Control Function
Write Mode
Register Name/Number of Bits
PICTURE HEIGHT/7
Function Explanation
Adjusts the picture height. 0000000: min 1000000: center 1111111: max
Output Change
Picture Change
Preset
Solid line
Dashed line center (1000000)
Pin 6
VD/1
Changes V-DRIVE mode 0: DC-coupling 1: AC-coupling
DC-coupling (0)
PICTURE WIDTH/7
Adjusts the picture width. 0000000: max 1000000: center 1111111: min Solid line Dashed line center (1000000) Pin 11
Sub-address 0C-D0 bit comes LSB.
V SHIFT/2
Where VD = 0, sets DAC output level of pin 2 is set. Where VD = 1, sets DC level of V-DRIVE is adjusted. 00: min 11: max Pin 6 (VD = 1) VD = 1 Solid line Dashed line min (00)
V LINEARITY/5
Corrects the vertical linearity. 00000: min 10000: center 11111: max Pin 6 Solid line Dashed line center (10000)
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Register Name/Number of Bits
V-EHT COMPENSATION/3
Function Explanation
Adjusts the compensated rate for the V-DRIVE by EHT-IN (pin 3). 000: min 111: max
Output Change
Picture Change
Preset
Solid line Pin 6
Dashed line min (000)
ANALOG V-BLK STOP PHASE/5
Sets the analog blanking stop phase on pin 20. Inputs the output from pin 20 to an external BLK-IN of synchronization IC. 00000: min 10000: center 11111: max
Solid line
Dashed line center (10000)
H-EHT COMPENSATION/3
Adjusts the compensated rate for the EW output by EHT-IN (pin 3). 000: min 111: max Pin 11 Solid line Dashed line min (000)
ANALOG V-BLK START PHASE/5
Sets the analog blanking start phase on pin 20. Inputs the output from pin 20 to external BLK-IN of synchronization IC. 00000: min 10000: center 11111: max Solid line Dashed line center (10000)
V-RAMP LIMIT LEVEL/4
Sets the V-ramp slice level. 0000: OFF 0001: min 1111: max Sub-address 05-D0 bit comes MSB. Pin 6 OFF (0000)
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Register Name/Number of Bits
V CENTERING/7
Function Explanation
Where VD = 0, DC level of V-DRIVE is adjusted. Where VD = 1, DAC output level of pin 2 is set. 0000000: min 1000000: center 1111111: max
Output Change
Picture Change
Preset
Solid line
Dashed line min
Pin 6 (VD = 0) VD = 0
(0000000)
V-DF PHASE/4
Adjusts the phase of the vertical dynamic focus output. 0000: min 1000: center 1111: max Pin 18 center (1000)
V-DF AMPLITUDE/4
Adjusts the amplitude of the vertical dynamic focus output. 0000: min 1000: center 1111: max Pin 18 center (1000)
H-DF PHASE/4
Adjusts the phase of the horizontal dynamic focus output. 0000: min 1000: center 1111: max Pin 16 center (1000)
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Register Name/Number of Bits
H-DF AMPLITUDE/4
Function Explanation
Adjusts the amplitude of the horizontal dynamic focus output. 0000: min 1000: center 1111: max
Output Change
Picture Change
Preset
Pin 16
center (1000)
H-DF CURVE/4
Adjusts the curve characteristic of the horizontal dynamic focus output. 0000: max 1111: min Pin 16 max (0000)
V INTEGRAL CORRECTION/4
Adjusts the vertical integral correction. 0000: min 1111: max Solid line Dashed line min (0000) Pin 6
V AGC/2
Sets the AGC gain for V-ramp. 00: LOW 11: HIGH
LOW (00)
V S CORRECTION/6
Adjusts the vertical S correction. 000000: min 100000: center 111111: max Solid line Dashed line min Pin 6 (000000)
EW PARABOLA/6
Adjusts the amplitude of the EW output. 000000: min 111111: max Solid line Dashed line min (000000) Pin 11
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TA1317ANG
Register Name/Number of Bits
EW TRAPEZIUM/7
Function Explanation
Adjusts the EW trapezium correction. 0000000: min 1000000: center 1111111: max
Output Change
Picture Change
Preset
Solid line
Dashed line center
Note: When this data is changed, V symmetry characteristic will be also changed.
(1000000) Pin 11
V STOP/1
Switches over the V-stop mode. 0: Normal 1: V stop/BLK stop Pin 6 Normal (0)
EW TOP CORNER/5
Adjusts the EW top corner correction. 00000: max 10000: center 11111: min Solid line Dashed line center (10000) Pin 11
EW BOTTOM CORNER/5
Adjusts the EW bottom corner correction. 00000: max 10000: center 11111: min Solid line Dashed line center (10000) Pin 11
EW S CORRECTION/5
Adjusts the EW S correction. 00000: max 10000: center 11111: min Solid line Dashed line center (10000) Pin 11
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TA1317ANG
Register Name/Number of Bits
EW CORNER/5
Function Explanation
Adjusts the EW corner correction. 00000: max 10000: center 11111: min
Output Change
Picture Change
Preset
Solid line
Dashed line center (10000)
Pin 11
CENTER PARABOLA/4
Adjusts the parabola-component amplitude. 0000: max 1000: center 1111: min Pin 19 Solid line Dashed line center (1000)
CENTER SAW/4
Adjusts the saw-component amplitude. 0000: min 1000: center 1111: max Pin 19 Solid line Dashed line center (1000)
V SYMMETRY/8
Corrects the vertical symmetry. 00000000: min 10000000: center 11111111: max Solid line Dashed line center (10000000)
Note: When this data is changed, EW trapezium characteristic will be also changed.
Pin 6
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Read Mode
Register Name/Number of Bits V DF/1 Function Explanation Vertical dynamic focus output self-check. 0: NG (no) H DF/1 1: OK (yes)
Horizontal dynamic focus output self-check. 0: NG (no) 1: OK (yes)
LVP/1
LVP (low voltage protection) is detected. 0: OFF (pin 17 is high) 1: ON (pin 17 is low)
V NF/1
V-NF input self-check. 0: NG (no) 1: OK (yes)
V GUARD/1
Detects abnormality on V-NF input. If abnormal, Pin 20 goes high. 0: OFF (normal) 1: ON (abnormal)
EW OUT/1
EW output self-check. 0: NG (no) 1: OK (yes)
V OUT/1
V-DRIVE output self-check. 0: NG (no) 1: OK (yes)
POR/1
Power-on reset. Responds with 0 at first reading after power-on, 1 at second reading. 0: Resister preset 1: Normal
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TA1317ANG
Data Transfer Formats via I C Bus
Slave address
A6 1 A5 0 A4 0 A3 0 A2 1 A1 1 A0 0 W/R 0/1
2
Start and Stop Condition
SDA
SCL S Start condition P Stop condition
Bit Transfer
SDA
SCL
SDA stable
Change of SDA allowed
Acknowledge
SDA by transmitter
Bit 9: High impedance
SDA by receiver Only bit 9: Low impedance
SCL from master S
1
8
9 Clock pulse for acknowledge
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Data Transmit Format 1
S Slave address 7 bit 0A Sub address 8 bit A Transmit data 9 bit MSB P: Stop condition AP
MSB S: Start condition
MSB A: Acknowledge
Data Transmit Format 2
S Slave address 0A Sub address A Transmit data A A AP
Sub address
Transmit data n
Data Receive Format
S Slave address 7 bit
MSB
1A
Receive data 8 bit MSB
AP
At the moment of the first acknowledge, the master transmitter becomes a receiver and the slave receiver becomes a transmitter. The Stop condition is generated by the master.
Optional Data Transmit Format: Automatic Increment Mode
S Slave address 7 bit MSB 0A1 Sub address 7 bit A Transmit data 1 8 bit MSB
Transmit data 2 8 bit MSB
AP
MSB
In this transmission method, sub-addresses are incremented automatically and data is set from the specified sub-address.
I2C BUS Conditions
Characteristics Low level input voltage High level input voltage Low level output voltage at 3 mA sink current Input current each I/O pin with an input voltage between 0.1 VDD and 0.9 VDD Capacitance for each I/O pin SCL clock frequency Hold time START condition Low period of SCL clock High period of SCL clock Set-up time for a repeated START condition Data hold time Data set-up time Set-up time for STOP condition Bus free time between a STOP and START condition Symbol VIL VIH VOL1 Ii Ci fSCL tHD;STA tLOW tHIGH tSU;STA tHD;DAT tSU;DAT tSU;STO tBUF Min 0 2.7 0 -10 0 4.0 4.7 4.0 4.7 100 250 4.0 4.7 Typ. Max 1.5 Vcc 0.4 10 10 100 Unit V V V A pF kHz s s s s ns ns s s
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Maximum Ratings (Ta = 25C)
Characteristics Power supply voltage Input pin voltage Power dissipation Power dissipation reduction rate Operating temperature Storage temperature Symbol VCCmax Vin PD (*) 1/ja Topr Tstg Rating 12 GND - 0.3 to VCC + 0.3 1250 Unit V V mW mW/C C C
-10 -20~65 -55~150
*: See the figure below.
1250
PD
850
Power dissipation
(mW)
0 0
25
65
150
Ambient temperature
Ta
(C)
Figure 1 PD - Ta Curve Operating Conditions
Characteristics Supply voltage (VCC) EHT input voltage FBP input amplitude FBP input frequency FBP input width SCL/SDA pull-up voltage LVP input voltage V input amplitude V input frequency V input width EW PWM input current Pin 7 Pin 3 Pin 12 Pin 12 Pin 12 Pins 13 & 14 Pin 17 Pin 21 Pin 21 Pin 21 Pin 8 Description Min 8.5 0.0 4.0 28 2.5 3.0 0.0 3.0 50 2.5 Typ. 9.0 Max 9.5 9.0 9.0 45 Unit V V V kHz

5.0
9.0 9.0 9.0 120
s
V V V Hz

5
s
mA
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TA1317ANG
Electrical Characteristics (unless otherwise specified, VCC = 9 V, Ta = 25C) Current dissipation
Pin Name VCC Symbol ICC Test Circuit Min 40 Typ. 50.8 Max 62 Unit mA
Pin voltages
Pin No. 1 5 Pin Name VREF V -DC REF Symbol V1 V5 Test Circuit Min 4.60 4.60 Typ. 4.88 4.88 Max 5.10 5.10 Unit V V

AC Characteristics
Characteristics Vertical trigger input shaped voltage Symbol VTH VTCH Timing pulse output voltage VTCM VTCL Vertical ramp wave amplitude Vertical drive amplification Vertical drive output voltage Vertical NF signal amplitude Vertical phase adjustment 1 (V shift) change amount VRMP GV V4H V4L VNFM VDC (80) VDC (83) VDC VDD (00) Vertical phase adjustment 2 (V centering) change amount VDD (FE) VDD VNFL Vertical amplitude adjustment (picture height) change amount VNFH VNFP VNFN V1 (00) V2 (00) V1 (80) Vertical linearity correction (V linearity) change amount V2 (80) V1 (F8) V2 (F8) VLIN VVT (00) Vertical symmetry (V symmetry) change amount VVT (FF) VVT Test Circuit Test Condition (Note 1) Min 1.2 3.90 (Note 2) 2.95 0.97 (Note 3) (Note 4) (Note 5) 0.00 (Note 6) 1.65 3.00 (Note 7) 5.65 2.30 1.64 (Note 8) 2.87 1.30 0.85 2.55 (Note 9) 43 48 53 0.00 1.85 3.55 6.20 2.65 1.82 3.16 1.45 1.00 2.75 0.30 2.05 4.10 6.75 3.00 2.00 3.45 1.60 1.15 2.95 Vp-p V V Vp-p 1.65 21 2.5 Typ. 1.5 4.10 3.15 1.07 1.75 24 3.3 Max 1.7 4.30 3.35 1.17 1.85 27 4.1 V Vp-p dB V Unit V

-53
0.90 0.69 0.82 (Note 10) 0.77 0.73 0.85 9.5 4.60 (Note 11) 5.40 0.67
-48
1.06 0.81 0.96 0.91 0.86 1.00 10.5 4.95 5.70 0.76
-43
1.22 0.93 1.10 1.05 0.99 1.15 12.5 5.20 6.00 0.85
%
Vp-p
%
V
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TA1317ANG
Characteristics Symbol VS (80) Vertical S correction (V S correction) change amount VS (BF) VS V (80) Vertical integral correction (V correction) change amount V (8F) V VE (80) Vertical EHT compensation (V EHT compensation) change amount VE (87) VEHT EHT input dynamic range VEHL VEHH VEV (00) Horizontal amplitude adjustment (picture width) change amount VEV (FC) VEV VPB (00) Parabola amplitude adjustment (EW parabola) change amount VPB (20) VPB (3F) VPB VTC (00) EW top corner correction (EW top corner) change amount VTC (F8) VTCP VTCN VBC (00) EW bottom corner correction (EW bottom corner) change amount VBC (F8) VBCP VBCN VM (00) EW corner correction change amount VM (F8) VMP VMN VS (00) EW S correction change amount VS (F8) VSP VSN VET (00) EW trapezium correction change amount VET (FE) VETP VETN VHC (80) Horizontal EHT compensation (H-EHT compensation) DC change amount VHC (87) VHC EHT (1) Parabola amplitude EHT compensation EHT (7) EHT Test Circuit Test Condition Min 1.92 (Note 12) 1.27 17 1.54 (Note 13) 1.62 3.0 1.58 (Note 14) 1.44 8.5 1.9 (Note 15) 5.9 5.20 (Note 16) 1.30 4.20 0.00 1.6 (Note 17) 2.8 2.8 2.3 0.9 (Note 18) 32
-46
Typ. 2.26 1.50 21 1.82 1.90 4.0 1.86 1.69 10.0 2.4 6.4 6.15 1.55 4.60 0.02 2.0 3.3 3.3 2.8 1.2 40
-40
Max 2.60 1.73 25 2.10 2.18 5.2 2.14 1.94 11.5 2.9
Unit Vp-p % Vp-p % Vp-p % V



6.9 7.10 1.80 5.00 0.06 2.3 3.8 3.8 3.2 1.4 46
-32
V
Vp-p
Vp-p
%
2.4 0.9 (Note 19) 32
-52
2.8 1.2 45
-40
3.2 1.4 55
-35
Vp-p
%
2.4 0.8 (Note 20) 40
-52
2.8 1.1 47
-42
3.2 1.4 57
-32
Vp-p
%
2.2 1.0 (Note 21) 28
-40
2.6 1.4 35
-32
3.0 1.6 40
-27
Vp-p
%
2.4 (Note 22)
-3.0
2.7
-2.7
3.0
-2.4
ms
11.0
-16.0
13.5
-13.5
16.0
-11.0
%
3.0 (Note 23) 4.0 1.0 1.55 (Note 24) 1.65 2.7
3.6 4.7 1.2 1.90 2.00 4.0
4.2 5.4 1.4 2.20 2.30 5.3 Vp-p % V
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Characteristics Symbol VX (00) AGC operating current VX (40) VX (80) VX (C0) Sawtooth correction (cent saw) maximum amplitude Parabola correction (cent par) maximum amplitude VN (8F) VN (80) VP (F8) VP (08) VHD (80) VHD (88) Horizontal DF amplitude adjustment (H DF amp) VHD (8F) VHDP VHDN THD (08) Horizontal DF phase adjustment (H DF phase) THD (F8) THD THB (00) Horizontal DF bathtub (H DF curve) adjustment THB (F0) THB VVD (80) VVD (88) Vertical DF amplitude adjustment (V DF amp) VVD (8F) VVDP VVDN TVD (08) Vertical DF phase adjustment (V DF phase) LVP detection voltage Vertical guard detection voltage Vertical guard detection output current (BLK-OUT output current) Vertical centering DAC output voltage 1 (V centering) Vertical centering DAC output voltage 2 (V shift) TVD (F8) TVD VLVP VVGH VVGL I20 VCA (00) VCA (FE) VCD (80) VCD (83) VY (00) Vertical centering change amount in V STOP mode Vertical NF signal amplitude at DC coupling Vertical NF center voltage at DC coupling VY (80) VY (FE) VDFB VC Test Circuit

Test Condition
Min 20
Typ. 35 65 340 715 5.0 5.0 2.2 2.2 2.8 3.1 3.4 10
-12 -2.1
Max 50 85 430 895 5.7 5.7 2.5 2.5 3.3 4.0 4.3 13
-7 -0.9
Unit
(Note 25)
45 250 535 4.3
A
(Note 26) 4.3 1.9 (Note 27) 1.9 2.1 2.4 (Note 28) 2.6 7
-15 -2.9
Vp-p
Vp-p
Vp-p
%
(Note 29)
0.9 3.0 15
2.1 4.2 20 15 2.1 2.40 2.70 3.00 10
-10 -2.0
2.9 4.8 25 20 3.1 2.75 3.10 3.45 13
-7 -1.5
s
(Note 30)
10 1.1 2.05 2.30
s
Vp-p
(Note 31)
2.55 7
-15 -2.5
%
(Note 32)
1.5 3.4
2.0 4.0 5.0 7.3 2.4 630 0.50 5.0 0.60 5.0 1.9 2.50 3.0 0.95 2.50
2.5 4.6 5.3 7.6
ms
(Note 33) (Note 34)
4.7 7.0 2.1
V V
2.7 750 0.55 V 5.3 0.80 V 5.3 2.1 2.75 3.3 1.05 2.75 Vp-p V V
A
(Note 35)
450 0.20
(Note 36) 4.7 0.20 (Note 37) 4.7 1.7 (Note 38) 2.25 2.7 (Note 39) (Note 40) 0.85 2.25
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Characteristics Vertical ramp cut level Symbol VCHH VCLH BLHL BLHM BLHH Analog blanking phase BLLL BLLM BLLH VPP (00) Parabola amplitude adjustment (EW parabola) change amount at PWM VPP (20) VPP (3F) VPP Test Circuit

Test Condition (Note 41)
Min 20.0 26.0 5.05 2.30
Typ. 26.0 32.1 5.90 2.70 0.00 6.00 2.40 0.00 0.02 2.00 3.30 3.30
Max 32.0 38.0 6.75 3.10 0.10
Unit %
(Note 42)
ms 6.90 3.00 0.10 0.06 2.30 3.80 3.80 Vp-p
5.10 2.05

0.00 1.6 (Note 43) 2.80 2.80
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Test Condition
Test Condition Note No. Parameter SW5 1 Vertical trigger input shaped voltage OFF SW6 B SW7 ON SW Mode SW8 OFF SW10 B SW11 ON SW17 A SW24 A (1) Input vertical trigger pulse (figure below) to pin VIN. (2) Increase vertical trigger pulse level (VT) from 0 VP-P. When timing pulse is output to pin 22 (TC FILTER), measure vertical trigger pulse level VTH. Test Method (unless otherwise specified, VCC = 9 V, Ta = 25 3C, data = preset values)
Vertical cycle = 20 ms
Vertical trigger pulse
Pulse level (VT) 0V 640 s
2
Timing pulse output voltage
OFF
B
ON
OFF
B
ON
A
A
(1) Input vertical trigger pulse to pin VIN. Pulse level (VT) = 3.0 V (2) Measure pin 22 (TC FILTER) voltages (VTCH, VTCM, VTCL) as shown in the figure below.
VTCH Pin 22 (TC FILTER) waveform VTCM VTCL
Pin 23 (V-RAMP FILTER) waveform
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Test Condition Note No. Parameter SW5 3 Vertical ramp wave amplitude OFF SW6 B SW7 ON SW Mode SW8 OFF SW10 B SW11 ON SW17 A SW24 A (1) Input vertical trigger pulse to pin VIN. Pulse level (VT) = 3.0 V (2) Measure pin 23 (V-RAMP FILTER) amplitude VRMP as shown in the figure below. Test Method (unless otherwise specified, VCC = 9 V, Ta = 25 3C, data = preset values)
Pin 23 (V-RAMP FILTER) waveform
VRMP
4
Vertical drive amplification
OFF
C
ON
OFF
B
ON
A
A
(1) No signal input to pin VIN. (2) Set VD (V-DRIVE mode switch) (sub-address: 00) to AC-Coupling mode (data: 81). (3) Connect external power supply (V6) to TP6 (V fb). (4) Change external power supply (V6) until pin 4 (V DRIVE) voltage is 0.8 V. The voltage is made V6A. (5) Measure pin 4 voltage (V4A) when the external power supply voltage is V6A + 0.2 V. (6) Calculate the drive amplification (GV) using the following formula. Pin 4 (V DRIVE) voltage (V4)
V4H V4A
0.8 V V4L V6A V6A + 0.2 V
Pin 6 (V NF) external supply voltage (V6)
GV = 20 log
V4A - 0.8
0.2
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Test Condition Note No. Parameter SW5 5 Vertical drive output voltage OFF SW6 C SW7 ON SW Mode SW8 OFF SW10 B SW11 ON SW17 A SW24 A (1) Measure V4H using the figure for Note 4. (2) Measure V4L using the figure for Note 4. 6 Vertical NF signal amplitude OFF C ON OFF B ON A A (1) Input vertical trigger pulse to pin VIN. Pulse level (VT) = 3.0 V (2) Set VD (sub-address: 00) to AC-Coupling mode (data: 81). (3) Set V INTEGRAL CORRECTION (sub-address: 08) to center (data: 88). (4) Set V S CORRECTION (sub-address: 09) to center (data: A0). (5) Set V SHIFT (sub-address: 01) data to 82. (6) Measure Pin 6 (V NF) vertical sawtooth amplitude VNFM. Test Method (unless otherwise specified, VCC = 9 V, Ta = 25 3C, data = preset values)
Pin 6 (V NF) waveform
VNFM
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Test Condition Note No. Parameter SW5 7 Vertical phase adjustment 1 (V shift) change amount OFF SW6 B SW7 ON SW Mode SW8 OFF SW10 B SW11 ON SW17 A SW24 A (1) Input vertical trigger pulse to pin VIN. Pulse level (VT) = 3.0 V (2) Set VD (sub-address: 00) to AC-Coupling mode (data: 81). (3) Set V INTEGRAL CORRECTION (sub-address: 08) to center (data: 88). (4) Set V S CORRECTION (sub-address: 09) to center (data: A0). (5) Set V SHIFT (sub-address: 01) to minimum (data: 80) and measure VDC (80) as shown in the figure below. (6) Set V SHIFT (sub-address: 01) to maximum (data: 83) and measure VDC (83) as shown in the figure below. (7) Calculate change amount VDC using the following formula. Test Method (unless otherwise specified, VCC = 9 V, Ta = 25 3C, data = preset values)
Pin 6 (V NF) waveform
VDC (83) VDC (80)
10 ms VDC = VDC (83) - VDC (80)
10 ms
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Test Condition Note No. Parameter SW5 8 Vertical phase adjustment 2 (V centering) change amount ON SW6 A SW7 OFF SW Mode SW8 OFF SW10 B SW11 ON SW17 A SW24 A (1) Input vertical trigger pulse to pin VIN. Pulse level (VT) = 3.0 V (2) Set VD (sub-address: 00) to DC-Coupling mode (data: 80). (3) Set V INTEGRAL CORRECTION (sub-address: 08) to center (data: 88). (4) Set V S CORRECTION (sub-address: 09) to center (data: A0). (5) Set V CENTERING (sub-address: 05) to minimum (data: 00) and measure VDD (00) as shown in the figure below. (6) Set V CENTERING (sub-address: 05) to maximum (data: FE) and measure VDD (FE) as shown in the figure below. (7) Calculate change amount VDD using the following formula. Test Method (unless otherwise specified, VCC = 9 V, Ta = 25 3C, data = preset values)
Pin 6 (V NF) waveform
VDD (FE) VDD (00)
10 ms VDD = VDD (FE) - VDD (00)
10 ms
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Test Condition Note No. Parameter SW5 9 Vertical amplitude adjustment (picture height) change amount OFF SW6 B SW7 ON SW Mode SW8 OFF SW10 B SW11 ON SW17 A SW24 A (1) Input vertical trigger pulse to pin VIN. Pulse level (VT) = 3.0 V (2) Set VD (sub-address: 00) to AC-Coupling mode (data: 81). (3) Set V INTEGRAL CORRECTION (sub-address: 08) to center (data: 88). (4) Set V S CORRECTION (sub-address: 09) to center (data: A0). (5) Set V SHIFT (sub-address: 01) data to 82. (6) Set PICTURE HEIGHT (sub-address: 00) to minimum (data: 01) and measure Pin 6 (V NF) amplitude (VNFL). (7) Set PICTURE HEIGHT (sub-address: 00) to maximum (data: FF) and measure Pin 6 (V NF) amplitude (VNFH). (8) Determine variable ranges (VNFP, VNFN) using the following formulas. Test Method (unless otherwise specified, VCC = 9 V, Ta = 25 3C, data = preset values)
Pin 6 (V NF) waveform
VNFP =
VNFH - VNFM VNFM
VNFH
VNFL
x 100,
VNFN =
VNFL - VNFM VNFM
x 100
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Test Condition Note No. Parameter SW5 10 Vertical linearity correction (V linearity) change amount OFF SW6 B SW7 ON SW Mode SW8 OFF SW10 B SW11 ON SW17 A SW24 A (1) Input vertical trigger pulse to pin VIN. Pulse level (VT) = 3.0 V (2) Set VD (sub-address: 00) to AC-Coupling mode (data: 81). (3) Set V INTEGRAL CORRECTION (sub-address: 08) to center (data: 88). (4) Set V S CORRECTION (sub-address: 09) to center (data: A0). (5) Set V SHIFT (sub-address: 01) data to 82. (6) Set V LINEARITY (sub-address: 02) to minimum (data: 00) and measure V1 (00) and V2 (00) as shown in the figure below. (7) Set V LINEARITY (sub-address: 02) to center (data: 80) and measure V1 (80) and V2 (80) as shown in the figure below. (8) Set V LINEARITY (sub-address: 02) to maximum (data: F8) and measure V1 (F8) and V2 (F8) as shown in the figure below. (9) Calculate maximum correction VLIN from measured result using the following formula. Test Method (unless otherwise specified, VCC = 9 V, Ta = 25 3C, data = preset values)
Pin 6 (V NF) waveform
V2 (**) V1 (**)
10 ms V1 (00) - V1 (F8) + V2 (F8) - V2 (00) 2 x [V1 (80) + V2 (80)]
10 ms
VLIN =
x 100
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Test Condition Note No. Parameter SW5 11 Vertical symmetry (V symmetry) change amount OFF SW6 B SW7 ON SW Mode SW8 OFF SW10 B SW11 ON SW17 A SW24 A (1) Input vertical trigger pulse to pin VIN. Pulse level (VT) = 3.0 V (2) Set VD (sub-address: 00) to AC-Coupling mode (data: 81). (3) Set V INTEGRAL CORRECTION (sub-address: 08) to center (data: 88). (4) Set V S CORRECTION (sub-address: 09) to center (data: A0). (5) Set V SHIFT (sub-address: 01) data to 82. (6) Set V SYMMETRY (sub-address: 11) to minimum (data: 00) and measure Pin 6 (V NF) voltage VVT (00). (7) Set V SYMMETRY (sub-address: 11) to maximum (data: FF) and measure Pin 6 (V NF) voltage VVT (FF). (8) Calculate change amount VVT using the following formula. Test Method (unless otherwise specified, VCC = 9 V, Ta = 25 3C, data = preset values)
Pin 6 (V NF) waveform
VVT (FF) VVT (00)
10 ms VVT = VVT (FF) - VVT (00)
10 ms
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Test Condition Note No. Parameter SW5 12 Vertical S correction (V S correction) change amount OFF SW6 B SW7 ON SW Mode SW8 OFF SW10 B SW11 ON SW17 A SW24 A (1) Input vertical trigger pulse to pin VIN. Pulse level (VT) = 3.0 V (2) Set VD (sub-address: 00) to AC-Coupling mode (data: 81). (3) Set V INTEGRAL CORRECTION (sub-address: 08) to center (data: 88). (4) Set V SHIFT (sub-address: 01) to 82. (5) Set V S CORRECTION (sub-address: 09) to minimum (data: 80) and measure VS (80) as shown in the figure below. (6) Set V S CORRECTION (sub-address: 09) to maximum (data: BF) and measure VS (BF) as shown in the figure below. (7) Calculate maximum correction VS using measured result and the following formula. Test Method (unless otherwise specified, VCC = 9 V, Ta = 25 3C, data = preset values)
Pin 6 (V NF) waveform
VS =
VS (80) - VS (8F) VS (80) + VS (8F)
VS (BF) x 100
VS (80)
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Test Condition Note No. Parameter SW5 13 Vertical integral correction (V correction) change amount OFF SW6 B SW7 ON SW Mode SW8 OFF SW10 B SW11 ON SW17 A SW24 A (1) Input vertical trigger pulse to pin VIN. Pulse level (VT) = 3.0 V (2) Set VD (sub-address: 00) to AC-Coupling mode (data: 81). (3) Set V S CORRECTION (sub-address: 09) to center (data: A0). (4) Set V SHIFT (sub-address: 01) to 82. (5) Set V INTEGRAL CORRECTION (sub-address: 08) to minimum (data: 80) and measure V (80) as shown in the figure below. (6) Set V INTEGRAL CORRECTION (sub-address: 08) to maximum (data: 8F) and measure V (8F) as shown in the figure below. (7) Calculate maximum correction V from measured result using the following formula. Test Method (unless otherwise specified, VCC = 9 V, Ta = 25 3C, data = preset values)
Pin 6 (V NF) waveform V (8F) V (80)
V =
V (8F) - V (80) V (80)
x 100
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Test Condition Note No. Parameter SW5 14 Vertical EHT compensation (V EHT compensation) change amount OFF SW6 B SW7 ON SW Mode SW8 OFF SW10 B SW11 ON SW17 A SW24 A (1) Input vertical trigger pulse to pin VIN. Pulse level (VT) = 3.0 V (2) Set VD (sub-address: 00) to AC-Coupling mode (data: 81). (3) Set V SHIFT (sub-address: 01) data to 82. (4) Connect external power supply (DC voltage = 0 V) to pin 3 (EHT IN). (5) Set V-EHT COMPENSATION (sub-address: 02) to minimum (data: 80) and measure Pin 6 (V NF) amplitude VE (80). (6) Set V-EHT COMPENSATION (sub-address: 02) to maximum (data: 87) and measure Pin 6 (V NF) amplitude VE (87). (7) Calculate change amount VEHT using the following formula. VEHT = VE (80) - VE (87) VE (87) Test Method (unless otherwise specified, VCC = 9 V, Ta = 25 3C, data = preset values)
x 100
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Test Condition Note No. Parameter SW5 15 EHT input dynamic range OFF SW6 B SW7 ON SW Mode SW8 OFF SW10 B SW11 ON SW17 A SW24 A (1) Input vertical trigger pulse to pin VIN. Pulse level (VT) = 3.0 V (2) Set VD (sub-address: 00) to AC-Coupling mode (data: 81). (3) Set V SHIFT (sub-address: 01) data to 82. (4) Connect external power supply V3 to pin 3 (EHT IN). (5) Set V-EHT COMPENSATION (sub-address: 02) to maximum (data: 87). (6) Change external power supply V3 from 1 to 7 V and monitor Pin 6 (V NF) amplitude. (7) When Pin 6 (V NF) amplitude changes, measure V3 voltages VEHL and VEHH. Test Method (unless otherwise specified, VCC = 9 V, Ta = 25 3C, data = preset values)
Pin 6 (V NF) amplitude
VEHL
VEHH
Voltage applied to pin 3 (EHT IN) (V3)
16
Horizontal amplitude adjustment (picture width) change amount
OFF
B
ON
OFF
B
ON
A
A
(1) Input vertical trigger pulse to pin VIN. Pulse level (VT) = 3.0 V (2) Set EW PARABOLA (sub-address: 0A) to minimum (data: 00). (3) Set PICTURE WIDTH to maximum ( (sub-address: 01, data: FC) and (sub-address: 0C, data: 81) ) and measure Pin 10 (EW FD) voltage VEV (FC). (4) Set PICTURE WIDTH to minimum ( (sub-address: 01, data: 00) and (sub-address: 0C, data: 80) ) and measure Pin 10 (EW FD) voltage VEV (00). (5) Calculate change amount VEV using the following formula. VEV = VEV (FC) - VEV (00)
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Test Condition Note No. Parameter SW5 17 Parabola amplitude adjustment (EW parabola) change amount OFF SW6 B SW7 ON SW Mode SW8 OFF SW10 B SW11 ON SW17 A SW24 A (1) Input vertical trigger pulse to pin VIN. Pulse level (VT) = 3.0 V (2) Set PICTURE WIDTH (sub-address: 01) to maximum (data: FC). (3) Apply external power supply (DC voltage = 7 V) to pin 3 (EHT IN). (4) Set EW PARABOLA (sub-address: 0A) to minimum (data: 00) and measure Pin 10 (EW FD) amplitude VPB (00). (5) Set EW PARABOLA (sub-address: 0A) to center (data: 20) and measure Pin 10 (EW FD) amplitude VPB (20). (6) Set EW PARABOLA (sub-address: 0A) to maximum (data: 3F) and measure Pin 10 (EW FD) amplitude VPB (3F). (7) Calculate change amount VPB using the following formula. Test Method (unless otherwise specified, VCC = 9 V, Ta = 25 3C, data = preset values)
VPB (3F)
VPB (00)
Pin 10 (EW FD) waveform VPB = VPB (3F) - VPB (00)
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Test Condition Note No. Parameter SW5 18 EW top corner correction (EW top corner) change amount OFF SW6 B SW7 ON SW Mode SW8 OFF SW10 B SW11 ON SW17 A SW24 A (1) Input vertical trigger pulse to pin VIN. Pulse level (VT) = 3.0 V (2) Apply external power supply (DC voltage = 7 V) to pin 3 (EHT IN). (3) Set EW PARABOLA (sub-address: 0A) to center (data: 20). (4) Set EW TOP CORNER (sub-address: 0C) to minimum (data: 00) and measure Pin 10 (EW FD) amplitude VTC (00). (5) Set EW TOP CORNER (sub-address: 0C) to maximum (data: F8) and measure Pin 10 (EW FD) amplitude VTC (F8). (6) Calculate change amounts VTCP and VTCN using the following formulas. Test Method (unless otherwise specified, VCC = 9 V, Ta = 25 3C, data = preset values)
VTC (00)
VTC (F8)
VTC(00) VTC(F8)
Pin 10 (EW FD) waveform VTC (00) - VPB (20) VPB (20) VTC (F8) - VPB (20) VPB (20)
VTCP =
x 100
VTCN =
x 100
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Test Condition Note No. Parameter SW5 19 EW bottom corner correction (EW bottom corner) change amount OFF SW6 B SW7 ON SW Mode SW8 OFF SW10 B SW11 ON SW17 A SW24 A (1) Input vertical trigger pulse to pin VIN. Pulse level (VT) = 3.0 V (2) Apply external power supply (DC voltage = 7 V) to pin 3 (EHT IN). (3) Set EW PARABOLA (sub-address: 0A) to center (data: 20). (4) Set EW BTM CORNER (sub-address: 0D) to minimum (data: 00) and measure Pin 10 (EW FD) amplitude VBC (00). (5) Set EW BTM CORNER (sub-address: 0D) to maximum (data: F8) and measure Pin 10 (EW FD) amplitude VBC (F8). (6) Calculate change amounts VBCP and VBCN using the following formulas. Test Method (unless otherwise specified, VCC = 9 V, Ta = 25 3C, data = preset values)
VBC (00)
VBC (F8)
VTC(00) VTC(F8)
Pin 10 (EW FD) waveform VBC (00) - VPB (20) VPB (20) VBC (F8) - VPB (20) VPB (20)
VBCP =
x 100
VBCN =
x 100
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Test Condition Note No. Parameter SW5 20 EW corner correction change amount OFF SW6 B SW7 ON SW Mode SW8 OFF SW10 B SW11 ON SW17 A SW24 A (1) Input vertical trigger pulse to pin VIN. Pulse level (VT) = 3.0 V (2) Apply external power supply (DC voltage = 7 V) to pin 3 (EHT IN). (3) Set EW PARABOLA (sub-address: 0A) to center (data: 20). (4) Set EW CORNER (sub-address: 0F) to minimum (data: 00) and measure Pin 10 (EW FD) amplitude VM (00). (5) Set EW CORNER (sub-address: 0F) to maximum (data: F8) and measure Pin 10 (EW FD) amplitude VM (F8). (6) Calculate change amounts VMP and VMN using the following formulas. Test Method (unless otherwise specified, VCC = 9 V, Ta = 25 3C, data = preset values)
VM (00)
VM (F8)
Pin 10 (EW FD) waveform VM (00) - VPB (20) VPB (20) VM (F8) - VPB (20) VPB (20)
VMP =
x 100
VMN =
x 100
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Test Condition Note No. Parameter SW5 21 EW S correction change amount OFF SW6 B SW7 ON SW Mode SW8 OFF SW10 B SW11 ON SW17 A SW24 A (1) Input vertical trigger pulse to pin VIN. Pulse level (VT) = 3.0 V (2) Apply external power supply (DC voltage = 7 V) to pin 3 (EHT IN). (3) Set EW PARABOLA (sub-address: 0A) to center (data: 20). (4) Set S CORRECTION (sub-address: 0E) to minimum (data: 00) and measure Pin 10 (EW FD) amplitude VS (00). (5) Set S CORRECTION (sub-address: 0E) to maximum (data: F8) and measure Pin 10 (EW FD) amplitude VS (F8). (6) Calculate change amounts VSP and VSN using the following formulas. Test Method (unless otherwise specified, VCC = 9 V, Ta = 25 3C, data = preset values)
VS (00)
VS (F8)
Pin 10 (EW FD) waveform VS (00) - VPB (20) VPB (20) VS (F8) - VPB (20) VPB (20)
VSP =
x 100
VSN =
x 100
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Test Condition Note No. Parameter SW5 22 EW trapezium correction change amount OFF SW6 B SW7 ON SW Mode SW8 OFF SW10 B SW11 ON SW17 A SW24 A (1) Input vertical trigger pulse to pin VIN. Pulse level (VT) = 3.0 V (2) Apply external power supply (DC voltage = 7 V) to pin 3 (EHT IN). (3) Set EW PARABOLA (sub-address: 0A) to maximum (data: 3F). (4) Set EW TRAPEZIUM (sub-address: 0B) to minimum (data: 00) and measure Pin 10 (EW FD) phase VET (00). (5) Set EW TRAPEZIUM (sub-address: 0B) to maximum (data: FE) and measure Pin 10 (EW FD) phase VET (FE). (6) Calculate change amounts VETP and VETN using the following formulas. Test Method (unless otherwise specified, VCC = 9 V, Ta = 25 3C, data = preset values)
VET (FE)
VET (00)
Pin 10 (EW FD) waveform
VETP =
VET (FE) 20
x 100
VETN =
VET (00) 20
x 100
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Test Condition Note No. Parameter SW5 23 Horizontal EHT compensation (H-EHT compensation) DC change amount OFF SW6 B SW7 ON SW Mode SW8 OFF SW10 B SW11 ON SW17 A SW24 A (1) Input vertical trigger pulse to pin VIN. Pulse level (VT) = 3.0 V (2) Apply external power supply (DC voltage = 1 V) to pin 3 (EHT IN). (3) Set H-EHT COMPENSATION (sub-address: 03) to minimum (data: 80) and measure Pin 10 (EW FD) amplitude VHC (80). (4) Set H-EHT COMPENSATION (sub-address: 03) to maximum (data: 87) and measure Pin 10 (EW FD) amplitude VHC (87). (5) Calculate change amount VHC using the following formula. Test Method (unless otherwise specified, VCC = 9 V, Ta = 25 3C, data = preset values)
VHC (87) VHC (80) Pin 10 (EW FD) waveform VHC = VHC (87) - VHC (80)
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Test Condition Note No. Parameter SW5 24 Parabola amplitude EHT compensation OFF SW6 B SW7 ON SW Mode SW8 OFF SW10 B SW11 ON SW17 A SW24 A (1) Input vertical trigger pulse to pin VIN. Pulse level (VT) = 3.0 V (2) Apply external power supply V3 to pin 3 (EHT IN). (3) Set EW PARABOLA (sub-address: 0A) to center (data: 20). (4) Set external power supply V3 to 7 V and measure Pin 10 (EW FD) amplitude EHT (7). (5) Set external power supply V3 to 1 V and measure Pin 10 (EW FD) amplitude EHT (1). (6) Calculate change amount EHT using the following formula. EHT = 25 AGC operating current OFF B ON OFF B ON A B EHT (7) - EHT (1) EHT (7) (1) Input vertical trigger pulse to pin VIN. Pulse level (VT) = 3.0 V (2) When V AGC (sub-address: 09) is switched, set data to 00, 40, 80, and C0 and measure the following. (3) Connect GND through 200 to pin 24 (AGC FILTER). (4) Monitor pin 24 (AGC FILTER) and measure pulse levels VX (00), VX (40), VX (80), and VX (C0) as shown in the figure below. (5) Calculate output currents (IX (00), IX (40), IX (80), IX (C0) using the following formula. VX Test Method (unless otherwise specified, VCC = 9 V, Ta = 25 3C, data = preset values)
x 100
Pin 24 (AGC FILTER) waveform
IX (**) =
VX (**) 200
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Test Condition Note No. Parameter SW5 26 Sawtooth correction (cent saw) maximum amplitude OFF SW6 B SW7 ON SW Mode SW8 OFF SW10 B SW11 ON SW17 A SW24 A (1) Input vertical trigger pulse to pin VIN. Pulse level (VT) = 3.0 V (2) Set CENTER SAW (sub-address: 10) to maximum (data: 8F) and measure pin 19 (CENT OUT) amplitude VN (8F). (3) Set CENTER SAW (sub-address: 10) to minimum (data: 80) and measure pin 19 (CENT OUT) amplitude VN (80). Test Method (unless otherwise specified, VCC = 9 V, Ta = 25 3C, data = preset values)
VN (80) Pin 19 (CENT OUT) waveform
VN (8F) Pin 19 (CENT OUT) waveform
27
Parabola correction (cent par) maximum amplitude
OFF
B
ON
OFF
B
ON
A
A
(1) Input vertical trigger pulse to pin VIN. Pulse level (VT) = 3.0 V (2) Set CENTER PARABOLA (sub-address: 10) to maximum (data: F8) and measure pin 19 (CENT OUT) amplitude VP (F8). (3) Set CENTER PARABOLA (sub-address: 10) to minimum (data: 08) and measure pin 19 (CENT OUT) amplitude VP (08).
VP (08)
VP (F8)
Pin 19 (CENT OUT) waveform
Pin 19 (CENT OUT) waveform
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Test Condition Note No. Parameter SW5 28 Horizontal DF amplitude adjustment (H DF amp) OFF SW6 B SW7 ON SW Mode SW8 OFF SW10 B SW11 ON SW17 A SW24 A (1) Input horizontal trigger pulse (figure below) to pin 12 (FBP IN). Pulse level (HT) = 4.0 V Test Method (unless otherwise specified, VCC = 9 V, Ta = 25 3C, data = preset values)
3 s
Pulse level (HT) H cycle = 30 s
(2) Set H-DF CURVE (sub-address: 08) to maximum (data: F0). (3) Set H-DF AMPLITUDE (sub-address: 07) to minimum (data: 80) and measure pin 16 (H-DF OUT) amplitude VHD (80). (4) Set H-DF AMPLITUDE (sub-address: 07) to center (data: 88) and measure pin 16 (H-DF OUT) amplitude VHD (88). (5) Set H-DF AMPLITUDE (sub-address: 07) to maximum (data: 8F) and measure pin 16 (H-DF OUT) amplitude VHD (8F). (6) Calculate change amounts VHDP and VHDN using the following formulas.
VHD (8F)
VHD (80)
Pin 16 (H-DF OUT) waveform VHD (8F) - VHD (88) VHD (88) VHD (80) - VHD (88) VHD (88)
VHDP = VHDN =
x 100
x 100
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Test Condition Note No. Parameter SW5 29 Horizontal DF phase adjustment (H DF phase) OFF SW6 B SW7 ON SW Mode SW8 OFF SW10 B SW11 ON SW17 A SW24 A (1) Input horizontal trigger pulse (figure below) to pin 12 (FBP IN). Pulse level (HT) = 4.0 V (2) Set H-DF CURVE (sub-address: 08) to maximum (data: F0). (3) Set H-DF PHASE (sub-address: 07) to minimum (data: 08) and measure pin 16 (H-DF OUT) phase THD (08). (4) Set H-DF PHASE (sub-address: 07) to maximum (data: F8) and measure pin 16 (H-DF OUT) phase THD (F8). (5) Calculate change amount THD using the following formula. Test Method (unless otherwise specified, VCC = 9 V, Ta = 25 3C, data = preset values)
THD (08) THD (F8) Pin 16 (H-DF OUT)waveform THD = THD (08) + THD (F8)
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Test Condition Note No. Parameter SW5 30 Horizontal DF bathtub (H DF curve) adjustment OFF SW6 B SW7 ON SW Mode SW8 OFF SW10 B SW11 ON SW17 A SW24 A (1) Input horizontal trigger pulse (figure below) to pin 12 (FBP IN). Pulse level (HT) = 4.0 V (2) Set H-DF AMPLITUDE (sub-address: 07) to maximum (data: 8F). (3) Set H-DF CURVE (sub-address: 08) to minimum (data: 00) and measure pin 16 (H-DF OUT) phase THB (00). (4) Set H-DF CURVE (sub-address: 08) to maximum (data: F0) and measure pin 16 (H-DF OUT) phase THB (F0). (5) Calculate change amount THB using the following formula. Test Method (unless otherwise specified, VCC = 9 V, Ta = 25 3C, data = preset values)
1V
THB (F0) THB (00)
Pin 16 (H-DF OUT) waveform THB (00) - THB (F0) 2
THB =
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Test Condition Note No. Parameter SW5 31 Vertical DF amplitude adjustment (V DF amp) OFF SW6 B SW7 ON SW Mode SW8 OFF SW10 B SW11 ON SW17 A SW24 A (1) Input vertical trigger pulse to pin VIN. Pulse level (VT) = 3.0 V (2) Set V-DF AMPLITUDE (sub-address: 06) to minimum (data: 80) and measure pin 18 (V-DF OUT) amplitude VVD (80). (3) Set V-DF AMPLITUDE (sub-address: 06) to center (data: 88) and measure pin 18 (V-DF OUT) amplitude VVD (88). (4) Set V-DF AMPLITUDE (sub-address: 06) to maximum (data: 8F) and measure pin 18 (V-DF OUT) amplitude VVD (8F). (5) Calculate change amounts VVDP and VVDN using the following formulas. Test Method (unless otherwise specified, VCC = 9 V, Ta = 25 3C, data = preset values)
VVD (8F)
VVD (80)
Pin 18 (V-DF OUT) waveform VVD (80) - VVD (88) VVD (88) VVD (8F) - VVD (88) VVD (88)
VVDP =
x 100
VVDN =
x 100
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2005-08-18
TA1317ANG
Test Condition Note No. Parameter SW5 32 Vertical DF phase adjustment (V DF phase) OFF SW6 B SW7 ON SW Mode SW8 OFF SW10 B SW11 ON SW17 A SW24 A (1) Input vertical trigger pulse to pin VIN. Pulse level (VT) = 3.0 V (2) Set V-DF PHASE (sub-address: 06) to minimum (data: 08) and measure pin 18 (V-DF OUT) phase TVD (08). (3) Set V-DF PHASE (sub-address: 06) to maximum (data: F8) and measure pin 18 (V-DF OUT) phase TVD (F8). (4) Calculate change amount TVD using the following formula. Test Method (unless otherwise specified, VCC = 9 V, Ta = 25 3C, data = preset values)
TVD (08)
TVD (F8)
Pin 18 (V-DF OUT) waveform TVD = TVD (08) + TVD (F8) 33 LVP detection voltage OFF B ON OFF B ON B A (1) Connect external supply voltage V7 to TP17 (LVP). (2) Decrease external supply voltage V7 from 9 V. When D5 data in Read mode changes from 0 to 1, measure TP17 voltage VLVP. 34 Vertical guard detection voltage OFF C ON OFF B ON A A (1) Connect external supply voltage V6 to TP6 (V NF). (2) Switch to VD (sub-address: 00) to AC-Coupling mode (data: 81). (3) Increase external supply voltage V6 from 5.5 V. When D3 data in Read mode changes from 0 to 1, measure TP6 voltage VVGH. (4) Decrease external supply voltage V6 from 5.5 V. When D3 data in Read mode changes from 0 to 1, measure TP6 voltage VVGL.
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2005-08-18
TA1317ANG
Test Condition Note No. Parameter SW5 35 Vertical guard detection output current (BLK-OUT output current) OFF SW6 C SW7 ON SW Mode SW8 OFF SW10 B SW11 ON SW17 A SW24 A (1) Connect external supply voltage V6 = 8 V to TP6 (V NF). (2) Measure pin 20 (BLK OUT) voltage V20 and calculate output current (I20) using the following formula. I20 = 36 Vertical centering DAC output voltage 1 (V centering) OFF B ON OFF B ON A A V20 10 k Test Method (unless otherwise specified, VCC = 9 V, Ta = 25 3C, data = preset values)
(1) Set VD (sub-address: 00) to AC-Coupling mode (data: 81). (2) Set V CENTERING (sub-address: 05) to minimum (data: 00) and measure pin 2 (CENTER DAC) voltage VCA (00). (3) Set V CENTERING (sub-address: 05) to maximum (data: FE) and measure pin 2 (CENTER DAC) voltage VCA (FE).
37
Vertical centering DAC output voltage 2 (V shift)
OFF
A
OFF
OFF
B
ON
A
A
(1) Set VD (sub-address: 00) to DC-Coupling mode (data: 80). (2) Set V SHIFT (sub-address: 01) to minimum (data: 80) and measure pin 2 (CENTER DAC) voltage VCD (80). (3) Set V SHIFT (sub-address: 01) to maximum (data: 83) and measure pin 2 (CENTER DAC) voltage VCD (83).
38
Vertical centering change amount in V STOP mode
ON
A
OFF
OFF
B
ON
A
A
(1) Set VD (sub-address: 00) to DC-Coupling mode (data: 80). (2) Set to V STOP (sub-address: 0B, data: 81). (3) Set V CENTERING (sub-address: 05) to minimum (data: 00) and measure Pin 6 (V NF) voltage VY (00). (4) Set V CENTERING (sub-address: 05) to center (data: 80) and measure Pin 6 (V NF) voltage VY (80). (5) Set V CENTERING (sub-address: 05) to minimum (data: FE) and measure Pin 6 (V NF) voltage VY (FE).
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TA1317ANG
Test Condition Note No. Parameter SW5 39 Vertical NF signal amplitude at DC coupling ON SW6 A SW7 OFF SW Mode SW8 OFF SW10 B SW11 ON SW17 A SW24 A (1) Input vertical trigger pulse to pin VIN. Pulse level (VT) = 3.0 V (2) Set VD (sub-address: 00) to DC-Coupling mode (data: 80). (3) Measure vertical Pin 6 (V NF) sawtooth width VDFB. Test Method (unless otherwise specified, VCC = 9 V, Ta = 25 3C, data = preset values)
Pin 6 (V NF) waveform
VDFB
40
Vertical NF center voltage at DC coupling
ON
A
OFF
OFF
B
ON
A
A
(1) Input vertical trigger pulse to pin VIN. Pulse level (VT) = 3.0 V (2) Set VD (sub-address: 00) to DC-Coupling mode (data: 80). (3) Measure center voltage VC as shown in the figure below.
Pin 6 V (V NF) waveform C
10 ms
10 ms
51
2005-08-18
TA1317ANG
Test Condition Note No. Parameter SW5 41 Vertical ramp cut level ON SW6 A SW7 OFF SW Mode SW8 OFF SW10 B SW11 ON SW17 A SW24 A (1) Input vertical trigger pulse to pin VIN. Pulse level (VT) = 3.0 V (2) Set VD (sub-address: 00) to DC-Coupling mode (data: 80). (3) Set V INTEGRAL CORRECTION (sub-address: 08) to center (data: 8F). (4) Set V S CORRECTION (sub-address: 09) to center (data: A0). (5) Measure amplitudes VT and VB as shown in the figure below. Test Method (unless otherwise specified, VCC = 9 V, Ta = 25 3C, data = preset values)
Pin 6 (V NF) waveform
VB
VT
10 ms
10 ms
(6) Set V-RAMP to maximum and measure amplitudes VTH and VBH. Sub-address 04 data: 87
Pin 6 (V NF) waveform
VBL VBH
VTH
10 ms Sub-address 05 data: 81 (7) Calculate cut levels using the following formulas. VCHH = VCLH = VT - VTH VT VB - VBH VB
10 ms
x 100,
x 100,
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2005-08-18
TA1317ANG
Test Condition Note No. Parameter SW5 42 Analog blanking phase ON SW6 A SW7 OFF SW Mode SW8 OFF SW10 B SW11 ON SW17 A SW24 A (1) Input vertical trigger pulse to pin VIN. Pulse level (VT) = 3.0 V, 60Hz (2) Set VD (sub-address: 00) to DC-Coupling mode (data: 80). (3) Set V INTEGRAL CORRECTION (sub-address: 08) to center (data: 8F). (4) Set V S CORRECTION (sub-address: 09) to center (data: A0). (5) AS shown in the figure below, measure analog blanking phase in relation to pin 21 (VIN) under the following conditions. (6) Set ANALOG V-BLK STOP PHASE (sub-address: 03) to minimum (data: 00) and measure blanking phase BLHL. (7) Set ANALOG V-BLK STOP PHASE (sub-address: 03) to center (data: 80) and measure blanking phase BLHM. (8) Set ANALOG V-BLK STOP PHASE (sub-address: 03) to maximum (data: F8) and measure blanking phase BLHH. (9) Set ANALOG V-BLK START PHASE (sub-address: 04) to minimum (data: 00) and measure blanking phase BLLL. (10) Set ANALOG V-BLK START PHASE (sub-address: 04) to center (data: 80) and measure blanking phase BLLM. (11) Set ANALOG V-BLK START PHASE (sub-address: 04) to maximum (data: F8) and measure blanking phase BLLH. Test Method (unless otherwise specified, VCC = 9 V, Ta = 25 3C, data = preset values)
Vertical trigger pulse
Pin 20 (BLK OUT)
BLLL BLHL BLLM BLHM BLLH BLHH
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2005-08-18
TA1317ANG
Test Condition Note No. Parameter SW5 43 Parabola amplitude adjustment (EW parabola) change amount at PWM OFF SW6 B SW7 ON SW Mode SW8 ON SW10 A SW11 OFF SW17 A SW24 A (1) Input vertical trigger pulse to pin VIN. Pulse level (VT) = 3.0 V (2) Set PICTURE WIDTH (sub-address: 01) to maximum (data: 8C). (3) Apply external power supply (DC voltage = 7 V) to pin 3 (EHT IN). (4) Set EW PARABOLA (sub-address: 0A) to minimum (data: 00) and measure Pin 10 (EW FD) amplitude VPP (00). (5) Set EW PARABOLA (sub-address: 0A) to center (data: 20) and measure Pin 10 (EW FD) amplitude VPP (20). (6) Set EW PARABOLA (sub-address: 0A) to maximum (data: 3F) and measure Pin 10 (EW FD) amplitude VPP (3F). (7) Calculate change amount VPP using the following formula. Test Method (unless otherwise specified, VCC = 9 V, Ta = 25 3C, data = preset values)
VPP (3F)
VPP (00)
Pin 10 (EW FD) waveform VPP = VPP (3F) - VPP (00)
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2005-08-18
Test Circuit
VCC 470 LED
1 F
M
A 24
1 24 1 SW24 B 23 2 CENTER DAC V-RAMP FILTER 22
M
VREF
AGC FILTER
C24 200 R24 1 F C23 0.02 F M C22 20 k R22 Vin
23
2 3 22 3 21 4 EHT IN TC FILTER
0. 1 F M 21 4 C4 5 5 3.6 k R5b 6 AB R5a V-DC REF SW5 10 k 1 k R4 V DRIVE VIN
20
BLK OUT
10 k 20 R20 19
19
6
Q6 C SW7 SW6 TP6 1 k 7 R6a 7 0.01 F 8 C7B 8 SW8 9 9 10 10 A SW10 B C7A EW PWM 220 F VCC
V NF
CENTER OUT
18
18 V-DF OUT
VCC
TA1317ANG
47 k A 17 R17 17 LVP IN 16 H-DF OUT TP17 SW17 B 16
ANALOG GND
15
15 DIGITAL GND EW FD
14
11 11
2.4 k R8f 1 F C8
SCL
55
1 k R10 Q10
M
EW FILTER 12 12
SCL
470 14 13 SDA FBP IN R14a 13 470 R13a
SDA
0.1 F Hin C11 SW11
M Mylar capacitor
SW12
16
1
CTC7 RTC13 15 2 RTC14 5.1 k 50 k 1200 pF CTC8 RTC16 RTC15 14 3 50 k 7.5 k 13 4 RTC17 51 k CTC9 5 Pin 10 F RTC18 51 k 6 12 TC4538BP 11 10 7
1000 pF
TA1317ANG
8
9
2005-08-18
F.B.T. 0.01 F 24 1 VREF AGC FILTER +B
1 F
M
1 F 23
CENTER DAC
V-RAMP FILTER
M
2
130 k EHT IN TC FILTER 0.02 F M 22 20 k 21 4 V DRIVE VIN 3
Application Circuit 1 (V-AC coupling/EW parabola output)
2.2 M 330 k 390 k
M 0.047 F
+21 V 270 k TA8427K 5 6 V NF 220 F 7 +9 V
M 0.01 F
20
V-DC REF
BLK OUT
19 CENTER OUT 18 V-DF OUT
TA1317ANG
+200 V
VCC
17
400 k 18 k
8 9
EW PWM
LVP IN
10 k 16 H-DF OUT ANALOG GND 33 k 7.5 k
56
-27 V H-OUT
10
15 DIGITAL GND EW FD +27 V
27 k 1.2 k
M 0.1 F
11 12
14 SCL EW FILTER 13 SDA FBP IN
M Mylar capacitor
TA1317ANG
2005-08-18
F.B.T. 0.01 F 24 1 VREF AGC FILTER +B
1 F
M
1 F 23
CENTER DAC
V-RAMP FILTER
M
2
130 k EHT IN TC FILTER 0.02 F M 22 20 k 21 4 V DRIVE VIN 3
Application Circuit 2 (V-DC coupling/EW PWM output)
2.2 M 330 k 390 k
M 0.047 F
+21 V 270 k -B
H ramp (Internal signal) FBP (Pin 12) 1 k 10 k 5 V-DC REF 0.056 F 10 k 6 V NF TA8427K DY 220 F 7 +9 V 0.01 F 8 9 EW PWM VCC EW parabola (Pin 11) ANALOG GND H ramp TA1317ANG
20 BLK OUT 19 CENTER OUT 18 V-DF OUT 17 LVP IN 10 k 16 H-DF OUT 400 k 18 k +200 V
EW PWM (Pin 8)
57
H-OUT
10
15
EW FD
DIGITAL GND
3900 pF 1200 pF 10 k
11 12
14
EW FILTER
SCL
13
FBP IN
SDA
G +25 V S D
M Mylar capacitor
TA1317ANG
2005-08-18
TA1317ANG
Package Dimensions
Weight: 1.22 g (typ.)
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2005-08-18
TA1317ANG
59
2005-08-18


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